具有QAM VSB 模式的载波及时序回复之数位積體電路設計.pdf

國 立 中 央 大 學 電 機 工 程 研 究 所 碩 士 論 文 具有 QAM/VSB 模式的載波及時序回復 之數位積體電路設計 Implementation of the QAM/VSB dual mode Carrier Recovery and Timing Recovery 指導教授 : 周世傑 博士 研究生 : 林欣怡 中 華 民 國 八 十 九 年 六 月 Implementation of QAM/VSB mode Carrier Recovery and Timing Recovery Advisor: Shyh-Jye Jou, Ph.D. Student: Hsin-Yi Lin Department of Electrical Engineering National Central University Chung-Li, Taiwan, R.O.C. June, 2000 Abstract In this thesis, an architecture design and hardware implementation of the carrier recovery (CR) and timing recovery (TR), which is suitable for both Vestigal SideBand Modulation (VSB) and Quadrature Amplitude Modulation (QAM), in CATV system are proposed. The proposed CR adopts a Steep Gradient mothod, while the proposed TR employs a baud-rate TR in our system. To reduce the hardware complexity, both of them use sign algorithm. Furthermore, to increase the acquisition range of CR, a Frequency Locked Loop (FLL) is used in VSB mode, while a derotator/rotator pair is adopted in QAM mode. As a result, the CR can reach 100KHz acquisition range from simulation results when using the ideal-like channel model with a little intersymbol interference (ISI). Besides, for enhancing the CR to fit all the feasible cable channel models, the filter of the FLL was re-designed in VSB mode. The filter coefficients have been modified that deamativally reduce the hardware complexity. Moreover, the control of rotator/de-rotator to switch the CR loop during different stages are used